this is a veroboard layout of a Sziklai pair, a daughter board for the Fiendmaster vero-layout project.
veroboard layout done with diy layout creator.
i didn’t have any PNP Ge available, so i tried BC160-10 PNP Si in TO-39 metal case transistors.
this is a veroboard layout of a Sziklai pair, a daughter board for the Fiendmaster vero-layout project.
veroboard layout done with diy layout creator.
i didn’t have any PNP Ge available, so i tried BC160-10 PNP Si in TO-39 metal case transistors.
